In networking systems, routers and/or switches typically move packets of information from one of a number of input ports to one or more output ports. A lookup function, which can be implemented as a hardware “search engine” or the like, can include content addressable memory (CAM) and/or standard memory, such as static random-access memory (SRAM). While the SRAM may commonly be accessed using “hashing” to essentially provide a “many-to-one” function, a search engine in general requires a search key to be applied. Such search keys are generally derived from packet headers and/or packet attributes. Further, typical systems include multiple memory bank organizations to facilitate parallel searching and the search keys must be constructed and allocated to one or more of these memory banks.
Referring now to FIG. 1, a block diagram of a conventional key construction approach is shown and indicated by the general reference character 100. An incoming stream of packet headers is shown as Packet Header X−1, Packet Header X, and Packet Header X+1. As shown for Packet Header X, each header can be divided into equal-sized sections or fields: HS0, HS1, . . . HSM. Each section of the packet can be mapped to each memory bank through corresponding multiplexers. Accordingly, each section HS0, HS1, through HSM can map to Memory Bank 104-0 via multiplexer 102-0 providing Key 0. Similarly, HS0-HSM can map to Memory Bank 104-1 via multiplexer 102-1 providing Key 1 and so on through Memory Bank 104-N receiving Key N through multiplexer 102-N. In this fashion, each section or field of a packet header can be allocated to a designated memory bank.
However, this conventional approach has several drawbacks, such as the die area consumed by these relatively large and complex multiplexer functions. Further, in many applications, searches to particular memory banks can be broken up according to the type of search and this means that the same packet header section does not have to be allocated to each memory bank. Also, this conventional approach is not flexible so as to be optimized to meet different user requirements or applications.
Consequently, what is needed is a key construction system that: (i) efficiently allocates packet header sections to search memory banks so as to reduce die size by decreasing circuit complexity; and (ii) provides user programmable flexibility in the packet header and/or attribute section to search memory bank allocation.